SCHNEIDER 30M901-LCD Monitor TV – LCD26S series – alignment procedure – how to enter service mode

Alignment Procedure
The panel in this model is LG PHILIPS 30’ LC300W01 A3P6, whose max-luminance is at 450 cd/m2. Analog parts adopt VCT3834A with Teletext function, inner multi-system Comb-filter, MCU and TCU for Teletext, extra 4M Flash EEPROM and 4M SRAM Teletext EEPROM. IF Amplifier adopts 
TDA9886T Multi-system PLL IC, MSP3411G for Nicam, and FS European Frequency which supports PAL DK BG I, SECAM BG/DK, SECAM L system.
Digital parts adopts

SAGE Project, Scaller chip which supports VGA/DVI input in main chassis part. 

TV input channel adopts 

AD9883A+FLi2200 to support A/D switches and De-interlace Progressive processing. Scalar output adopts

 LVDS switch IC SN75LVDS83, which will switch LVDS to PANEL CN1 Socket.

INVERTER comprises by two groups +24V power suppliers and signal switching controller.

ALIGNMENT INSTRUCTION:
1. Adjustment of Analog Chassis Parts
In 30 inch LCD TV, Analog Chassis Parts are comprised of three main boards:
A. Main-signal Processing Board, which is including Video, Audio, Code, and Teletext process of sub-signal, Board named: 40-3026WS-MA* (* =A. B. C. D. …..)
B. IF Amplifier Board, named: 40-LS3026-TU* (* =A. B. C. D. …..)
C. Power Amplifier Board, named: 40-3026WS-AM* (* =A. B. C. D. …..)
Checking of IF Amplifier Board
Procedures
1) Connecting IF Amplifier Board (without shield cover) to P602 in Switching Board via VGA；
2) Switching on the Displayer, + 3V red light will be on in RC receiving board. Press “Standby” in RC, the red light will be off. Applying Factory Signal to see whether the sound, Nicam, and searching channel are OK；
3) Pressing“i”key in RC to enter into User Menu, pressing pin“6”“4”“0”“5”keys to Factory Menu (service mode) , and select AGC Menu. Setting switching mode to NORMAL, AGC to 14, pressing “EXIT” to exit.
4) Switching off the Displayer. Taking out IF Amplifier, and soldering shield cover.
Checking of Analog Main Board
Procedures
1)Inserting P1, P2, P14 in Digital Board to P1001, P1002 and P5540 in Analog Board
2) Connecting Computer to S5504 via COM connector, turning off the reset switch in the connector
3) A. Setting PC mode in Digital Board;
B. Switching on the unit with RC;
C. After Screen is on, running FLASH PROGRAM for 2 seconds in Computer Communication Program;
D. Turning on the reset switch in the connector, then carrying out the program to burn
4) After burned, please take out the S5504 connector
5) Switching off Reset power on with RC, pressing “0” key and “OK” key to enter TV mode, the Noise Signal will be displayed, press “i” in RC to enter into User Menu, and setting OSD
to ENGLISH or other languages
6) Making an elementary setting in PICTURE menu:
Brightness ---- 50, Contrast ---- 70, Color ---- 40, Tint ----10
7) Pressing “OK” to save and “exit”；
8) Pressing “i” and “CH-” to select and “CH+” to enter into PROGRAM menu, pressing “CH-”to select “SEARCH >”, and pressing “VOL +” to searching channels. Press EXIT to exit when finished
9) Checking all channels to see whether the sound and picture are OK or not. Signal should be switched after applying SCART signal. Input and output function should be checked in SCART 1 & SCART 2. There is not output function in SCART 3. (“0” key in RC to open menu, “V” key to OK)

Digital Board, turning on the main power switch to electrify CPU (3.3V) in Digital Board;

3) A. Switching on the Unit using RC;

B. Electrifying Analog Board with 12V, +5V to IC JACASM in Digital Board simultaneously;

C. After several seconds, sound and picture will be OK. (TV mode is in normal mode without SCART Signal)

4) Applying TV signal (Gray Scale and Color Bar Signal), pressing “0”, “6”, “4”, “0”, “5” in RC, the AD9883 menu will be displayed, please setting the data as following:

R 97

G 98

B 98

BRIG 183

CON 50

Pressing“EXIT” to exit

5) 1 Applying VGA signal, press “0” in RC to choose PC mode and pressing “OK” to confirm. Switching to VGA mode and selecting VGA to Gray 16 Scales.

2 Pressing “0”, “6”, “4”, “0”, “5” in RC to enter into Factory Mode, setting the data as below:

JAGASM of VGA:

R 93

G 103

B 98

BRIG 183

CON 50

Adjustment of Digital Board

Procedures：

1) A. Inserting P1 (8pins) in Digital Board to P1001 in Analog Main Board;

B. Connecting P14 in Digital Board to P5540 in Analog Main Board via 10Pins Line;

C. Connecting P24 in Digital Board to P1004 in Analog Main Board via line;

D. Inserting INVERTER switch Plug to P7 (Pin 3-5);

E. Connecting P2 in Digital Board to P1002 in Analog Main Board via line;

2) Inserting DC Plug in Extra Power Supplier to P18 in 

Pressing“EXIT” to exit；

3 Pressing “i” in RC to enter into the User menu to setting the following items when applying VGA signal:

Pressing “OK” to save and“EXIT” to exit；

* Note: Best Resolution： 1024X768 60Hz mode.

6) DVI checking

Procedures

1 Inserting DVI plug into P10 in Digital Board；

2 Pressing “0” in RC to enter into signal menu, pressing “CH+/CH-” to choose “DVI” and “OK” to enter into DVI mode

3 Applying the kinds of testing signal, whether they all can be identified and the output are normal in DVI signal sources；

4 Entering into main signal menu and setting into the “TV” mode；

5 Taking out DVI plug and shutting off AC power supply.

Adjustment of Complete LCD TV

Procedures：

 Adjustment of AGC

1 Power on the Unit and applying the TV signal sources.

TV signal sources setting as below

f=48.25MHz

System: PAL B/G

Signal： Full color bar

Intension： 65dB；

2 Pressing “i” key in RC to enter into User Menu, pressing pin “6”“4”“0”“5” keys to Factory Menu, pressing “<<” key to select item, “V+& V-” to adjust the data.

Setting AGC data to 14 to obtain the Noise of Screen Signal is at minimum.

DVSS: ON
3 Setting BURN IN at On
( Analog Board is on when no signal, Normal User mode is OFF)
LCD TV TCL Ver. 1.22B/13/10/2003 (Update irregularly)
Auto Format 4:3
Tuner AGC 14
Transparent OSD 66
DVSS ON
Burn-in Mode ON
Min.volume.1% 10
Sound curve.10% 64
Sound curve.20% 86
Sound curve.40% 105
Sound curve.80% 121
Sound curve.100% 127
4 Pressing“EXIT” to exit.

Adjustment of White Balance in VGA mode

1 Applying VGA signal, 1024 X 768 60Hz, switching signal source to PC mode,

9300K.

2 Choosing White Signal, using Color Temperature Instrument or White Balance

Instrument to test the color coordinate.

3 Pressing“0”, “6”, “4”, “0”, “5” key in RC to enter into Factory Mode, pressing “CH+,

CH-” to select item, “V+, V-” to adjust R、 G、 B data to obtain x=284+5，

Y==299+5；

4 7000K X=305+15， Y==320+15 (no use now)

5 7500K X=299+15， Y==315+15 (no use now)

AUTO Adjustment of User Setting in VGA mode

1 Applying Square Signal, pressing “i” key in RC to enter into User Menu.

2 Pressing “CH+, CH-” to select “AUTO” item, and “V+” to active the auto adjustment then screen will be dark instantly. If finished, screen will be OK automatically.

3 If auto adjustment lost or some disturb/noise in screen, please adjust PHASE by manual.

Applying signal modes：

640 X 480 (60, 72, 75, 85Hz)

720 X 400 (60, 70Hz)

800 X 600 (60, 75, 85Hz)

1024 X 768 (60, 75, 85Hz)

1280 X 1024 (60, 75, 85Hz)

To do the checking and auto adjustment separately when applying the kinds of signals, if no problem exists, it is unnecessary to adjust the data in EEPROM.

Adjustment of White Balance in TV mode.

1 Applying SCART White Signal, using White Balance Instrument to test.

2 Pressing “0”, “6”, “4”, “0”, “5” key in RC to enter into Factory Mode, pressing “CH+, CH-” to select item, “V+, V-” to adjust R G B data to obtain X=0.284,

Y=0.299, color temperature: 9300, Luminance> 400cd.

3 Pressing“EXIT” to exit.

Checking Complete LCD TV

1 Applying TV signal to check whether AGC can work normal.（40~100dB TV signal).

If AGC is abnormal, please do fine tuning.  (If overloading, lower AGC Value)

2 Applying SCART signal to check whether the input and output of SCART can work normal in R G B, Y/C, SCART, 16:9/4:3 mode.

3 Applying VGA signals to checking:

640 X 480 (60, 72, 75, 85Hz)

720 X 400 (60, 70Hz)

800 X 600 (60, 75, 85Hz)

1024 X 768 (60, 75, 85Hz)

1280 X 1024 (60, 75, 85Hz)

4 Checking PIP in TV Signal (VGA mode)
a. Pressing “0” to choose PC mode and“OK” to enter into VGA mode, applying VGA signal.
b. Pressing key in RC to active PIP function, pressing this key continuously to scale up the PIP picture and disappeared circularly , there are four scales.

c. Pressing “<< ” key to locate the PIP picture from Top-left, Top-right, Bottom-right, Bottom-left and center circularly.
d. Pressing key in RC to close the PIP when the picture is in largest scale.
e. Press Green Key in RC can switch the PIP signal source

5 Checking PIP in DVI mode
Pressing “0” to choose PC mode and“OK” to enter into DVI mode.
Repeat 4 to check PIP scale and location.
6 Safety Checking
a. AC 3000V; b. Resistance> 4MΩ
7 Default data setting:
Applying factory signal, setting the data to default when in best picture, best sound and so on.

Hi-Power stereo amplifier circuit diagram and descriptions using MJL21194, MJL21193 power transistors

ALESIS MATICA 500/900 A4/A8 - MJL21194, MJL21193

The A4/A8 amplifiers are basic stereo amplifiers. They have 0dBm input sensitivities for rated output at 4:, with the ability to drive any load impedance from 2: to an open circuit. They have balanced inputs via Neutrik combination connectors providing XLR and 1/4" TRS connections and also a barrier strip. The output of the amplifier is obtained by way of four five way binding posts. Reference designations in the text refer specifically to the A4 amplifier except where otherwise noted. Though reference designations between the two units are different, the designs are virtually identical. The only significant differences occur in the output section (since the A8 is required to handle much more power than the A4).

Here are some of the major features and building blocks of the Matica
* An input balanced to unbalanced converter.
* A second stage pre-amp and an amplifier gain stage utilizing a monolithic front end with discrete complimentary transconductance stage and a complimentary output stage in a common collector configuration.
* Output device protection is accomplished with a conventional volt-amp current limiter circuit.  The output devices use a new perforated emitter technology unique to MOTOROLA. The output devices are driven by similar technology devices, but they have been optimized for extremely linear current gain with a unity gain bandwidth (Ft) of 50 MHz.
* The speakers are protected by output relays. They are activated during the first 3 to 5 seconds the amplifier is turned on. Also, if a DC condition exists at the output of the amplifier or the amplifier is driven to full output below 5Hz the relays will be activated.
* Thermal management and protection are accomplished with a large heavy aluminum extruded heat sink the is fan cooled. If the sink gets warmer than 55 deg. C, the fan is automatically stepped up in speed and if the heat sink gets warmer than 80 deg. C the fan is run at high speed and the output relays are activated to disconnect the load until the unit has cooled to 65 deg. C. There is also a unique feature of the amplifier fan circuit in that when the amplifier is providing an output signal of a little more that a watt the fan speed is modulated or increased by the signal. This will help get longer run times with the amplifier under extreme load conditions.

Input Section

The input stage is made up of a dual Signetics 5532A op amp. This is a low noise selected version of the 5532. One half of the dual is used for each channel. The circuit is a basic balanced to unbalanced converter. It can be driven unbalanced but 6dB differences in gain may result for various hookups. If the (+) input is driven with the (-) input grounded the gain will be unity. If the (+) input is driven with the (-) input left open there will be a gain reduction of 6dB.

This is not recommended as a noisier condition may result. If the (-) input is driven, gain will be unity and will not change with the grounding or ungrounding the (+) input The maximum input level before clipping in about +21dBm. Since there is no level control in front of the converter this is the maximum input level for the amplifier. Connections to the Alink connector are between R1, R2 and R3, R4. These are provided so an outboard impedance may be connected to modify the gain and overload characteristics as well as its frequency response. Following the amplifier is a passive low pass (R7, C1) filter that begins to limit the high frequency gain of the amplifier.

Pre-Amp Section
The pre-amp section also uses the Signetics 5532A op amp. The circuits of the pre-amp are of opposing signal polarity to provide push pull characteristics and are connected via the stereo/bridge switch. Each of the two pre-amp channels has 15.7 dB of gain but channel A is inverting and channel B is not.
Since the main amplifier is inverting, channel A will not invert the signal and channel B will. Doing this facilitates two things. When the stereo/bridge switch is in the bridge mode channel B will already be out of phase with A so no signal inversion will have to be done to achieve bridge operation. Also by operating B out of phase all the time, (even in stereo operation) getting the phase of the signal flipped back at the speaker terminals, the amplifiers low frequency power bandwidth will be increased. This allows the power supply to be utilized more efficiently.
This section also shapes the bandwidth of the amplifier further via another low pass pole being added to each stage. First and second stage high pass filtering occurs via the 100uf coupling capacitors preceding the volume pots and after the pre-amp stages. The pre-amp stages drive the main amplifier directly.
ALINK connections at the junction between R8, C2 and R13, C5 are for sending the output signal of the input stage at a low impedance for use with auxiliary equipment. The connection between R9, R10 and R14, R17 are to be used to for defeating the level controls by supplying an input signal from a very low source impedance to swamp out the signal from the pots.

Main Amplifier Section

The main amplifier is composed of four sections

> The monolithic front end.

> A complimentary voltage gain stage or transconductance stage

> The output driver

> The output stage

The amplifier is configured in the inverting mode. This allows for the inputs of the op amp to remain at a 0 voltage potential and ease operation on a +/- 15 volt supply. The large voltage swing is accomplished with a discrete, complimentary darlington connected transconductance stage Q1, Q2, Q3, and Q4. The current in the transconductance stage is set by the voltage divider network made up of R19, R20, R21, and R22. The first transistor in the darlington is a TO-92 packaged device with the current set by R27, and R28. The collector of this transistor is not tied to the second collector in the darlington connection but rather to the +/-15 volt supply to help increase the bandwidth of the stage and reduce the dissipation in the TO-92 devices. The closed loop gain of the amplifier has been set for 10X or 20dB. The DC output offset is a function of the input offset voltage error of the op amp times the gain of the system. With the offset error of the op amp at about +/- 1mv the amplifier will have less than +/- 10mv of output offset. The feedback network is composed of R25, R18, and C11. C11 reduces the bandwidth of the amplifier. The large low frequency gain of the op amp helps to reduce the supply ripple that is introduced into the system by the lack of supply rejection in the voltage gain stage. Under driven conditions at mild loads of 4 or 8: at mid and high frequencies, the output of the op amp will appear not to have any signal or very little signal on it. When the amplifier is clipped, or driven to its rail, the output of the op amp will be driven to its rail, or about +/- 14 volts. It is trying to correct the loop error or non linearity of clipping in the amplifier. The only other time the output of the op amp will become a large signal is at a 2: condition at lower frequencies. This is due to the loss of loop gain when the transconductance stage is required to deliver large amounts of current to the output stage drivers. CR1 and CR2 are connected as clamps to the discrete darlingtons (causing the transconductance stage not to saturate, which reduces the possibility of saturation in the gain stage).

The drivers and output devices are mounted on the large extruded aluminum heat sink.

The drivers have extremely linear gain with changes in current. They also have an Ft of 50mHz keeping the gain linear with frequency. The output devices are 16 amp, 250 volt, 200 watt devices. These are very strong devices. The output stage is configured in a common collector, or emitter follower configuration. The drivers are connected again in a discrete complimentary darlington configuration. This allows for a class A bias and protection scheme that offers very close bias tracking and simple current limiting. Also there are 1.2: resistors in the bases of all the output devices. This helps linearize the gain with frequency and reduce high current parasitics. When the output stage is biased properly, the DC voltage drop across the emitter resistors should by 2-3mv cold and may rise to as much as 6-10mv when hot. Finally the output of the amplifier is de coupled from the load with a traditional termination network. This network isolates the amplifier and feedback loop from loads at high frequencies, especially capacitive ones. This is how unconditional loop stability is achieved. Under bench test conditions it is recommended that the amplifier not be driven to full power at 20kHz and above for periods longer than a few minutes as this will cause R53 to over heat. Under music conditions there is never enough energy to have this be a problem.

Click on the pictures to zoom in

Power amplifier [8 power transistors at output stage] - Schematic

Cooling fan regulator schematic

Output Device Protection
Output device protection is accomplished with a relatively simple circuit. The protection circuit is broken up into Q17 that protects the NPN output devices and Q18 that protects the PNP output devices. These devices are complimentary as are the output devices but they also have similar Vbe N to P. This allows selection of a point of protection that will be about equal for each half of the output stage. R55 and R56 sense the voltage at the emitter of two of the output devices and sum them. The emitter of Q17 is connected to the output of the amplifier. When a voltage across the emitter resistors of the output devices reaches about 0.7 volts, Q17 will conduct if there is no voltage across R54. This condition exists for a short circuit or something very close. As the amplifier impresses a voltage across a load it also has that same voltage across R54. As the voltage across R54 gets larger more current must flow through the emitter resistors of the output devices to cause enough voltage to be developed at the base of the protection device to turn it on. This is what is known as the load line. As the voltage across the output devices gets lower they can deliver more current in keeping with a constant power. When the protection device is conducting the current from the transconductance stage is essentially being diverted around the output stage to the load. Everything described for the positive half cycle is the same for the negative half. C18 and C19 slow down the protection device and keep it from any possible oscillation condition. CR3 and CR4 are used to protect possible reverse Vbe conduction of the protection devices and CR4 and CR5 prevent conduction of the protection devices while in the opposite half cycle.

Power amplifier [12 power transistors at output stage] schematic

Cooling fan regulator schematic

Bias Circuit
The bias circuit is more that just a single device Vbe multiplier seen in many audio amplifiers. The circuit consists of an active shunt regulator. The reason for this is two fold. The shunt regulator has a much lower impedance than the single device regulator. This helps control the bias voltage better when there is a change in the quiescent operating current of the transconductance stage. Since the operating, or quiescent current of the transconductance stage is supply dependent, the need for a bias circuit that doesn't change voltage with current is imperative. Also by reducing the current through the bias sense transistor a larger change in Vbe with temperature can be realized. This tracks the needs of the output stage better. The 5k pot in the bias circuit adjusts the potential of the regulator. A 1.5k resistor (R55) sets the current through the bias sense transistor (Q18) making the current in the sense transistor relatively constant. Q17 is the pass transistor of the regulator. Note that any time the output transistors are replaced, the pass and bias transistors must also be replaced. Failure to do so will probably result in the output transistors failing again.

Speaker Protection

There are two sections to the speaker protection circuit. A section made up of a quad comparator with a low pass filter before it and a discrete bipolar transistor circuit that controls the two speaker relays. The transistor circuit and +15 volt three terminal regulator make up the power up delay circuit and "instant off" power down circuit. When the unit is turned on the 15 volt regulator supplies power to the discrete circuit. Q24 controls the speaker relays and is held off during power up by Q23. During power up C24 is not charged and must be charged before Q23 will turn off. This delays the turn on of the output relays to protect against any transients that may occur at power up. Once on, there are four ways the relays can be opened again.

* The first is if the heat sink gets to 80 deg. C. then TH1 will open and release the relays.

** Second is by shut down of the amplifier. Upon the removal of AC to the amplifier, the three terminal regulator will fall out of regulation that forces Q21 on because C23 acts like a battery and momentarily turns on Q21. This pulse will cause Q22 to dump the charge on C24, turning on Q23.

*** The third way is if the line voltage get low (about 90 volts in the 120v unit). At this time the regulator will fall out of regulation and the first pulse from the 50 or 60 Hz that gets through the regulator will cause C24 to be dumped again and the 3-5 second charge time will occur again.

**** The fourth way is to have the circuit be triggered by the comparator circuit.

The comparator is DC coupled to the output of the amplifier before the speaker relays.

They are set up with each one of their inputs tied to a +/- 1.2v reference derived from CR7, CR8,CR9, and CR10. The low pass filter is comprised of R64, R65, R66, R67, C21, and C22. When the output of the amplifier is driven to full output at or below 5Hz, or 1.2v of DC offset appears at the output of the amplifier, it will trigger one of the comparators which in turn opens the output relays. When this happens the same 3 to 5 second period must occur before the relays will engage again. If the fault condition persists then the relays will remain open.

The 18 volt AC winding which runs this circuit is rectified by a half wave rectifier. This is allows one side of the winding to be grounded. The 18 volt winding is also provided at the Alink connector to facilitate generation a +/- 15 volt supply to run auxiliary accessories requiring phantom power.

Fan Speed Control

The fan circuit has three modes of operation in which it varies the speed of the fan depending on demand or condition. At power up of the amplifier Q25 and Q26 will be saturated until the relay circuit enables the speaker relays. This condition lasts for 3 to 5 seconds. During this time Q27 is also saturated. This forces the fan to run at an elevated speed momentarily.

After this time only R85 will be delivering current to the fan. The fan will be running at a very slow speed. The reason for the accelerated speed of the fan at turn on is that the current delivered by R85 may not be sufficient to start the fan, especially at low power line levels.

Signals from both channels are detected by Q25 and Q26 as the amplifier is driven harder. They act as rectifiers of the signal, and when they conduct the 40: resistor connected to Q27 delivers more current to the fan motor, causing the fan speed to increase with the drive of the amplifier.  The fan motor itself acts as a flywheel or filter to smooth the modulation and the speed of the fan is proportional to the average of the drive to the amplifier. If the heat sink gets hotter than 55 deg.C. then an additional 20: resistor is switched in to deliver more current to the fan. The fan speed will still be modulated by the drive to the amplifier. If the heat sink gets hot enough to trip the 80deg. C. breaker, then the relay circuit will disconnect the load and also turn on Q25 and Q26. This will increase the fan to its highest speed and cool the amplifier. Upon cooling below 65deg. C. the amplifier will resume normal operation.

Troubleshooting
The following chart is intended to help point a technician in the right direction.
Unfortunately there isn't space to provide an absolutely comprehensive list, however this should help with some of the more common solutions.

Thermal Management System
The large extruded aluminum heat sink in the center of the chassis is the heart of the amplifiers heat dissipation scheme. It is a forced air cooling system. In the A8 the heat sink has a thermal resistance of .075 deg. C. per watt when the fan is at full speed. This is equal to about 800 watts of heat. The air from the fan is forced into the center of the side of the heat sink with fins and the air flows around the sink and out over the amplifier circuitry. It has an air intake at the front of the amplifier and exhaust at the left rear. As explained in the fan speed control section, the speed of the fan is determined by the demands on the amplifier. If for some reason the fan should stop but not fail there is enough dissipation in the main heat sink as well as the four TO-220 stand up heat sinks on the PCB to allow operation indefinitely while at a quiescent condition.

Stripped Heat Sinks
occasionally when tightening down the heat sink clamps one of the screws will strip the threads out of the heat sink itself. Because heat sink is a rather expensive and bulky item, a way was found to reuse stripped heat sinks. Use a long (at least 1 1/4") machine screw from the clamp side, and a threaded hex standoff inserted into the heat sink fin side. Do not use just a hex nut, as it will probably not be able to hold the clamp pressure any more then the heat sink did.

AOC LC32R03 and AOC LC42R03 LCD TV SMPS circuit diagram

AOC LC32R03 - 715G3811P01H20003H, AOC LC32R03 - 715G4088P01W30003H, AOC LC32R03 - 715G3770P02W20003S, AOC LC42R03F and FC - 715G3760P01W20003M

715G3811P01H20003H - 715G3770P02W20003S - 715G3760P01W20003M Power board schematic

Click on the schematics to magnify

Akira 14BM18 CTV – how to enter service mode, circuit diagram - TDA-935X - STR-G5653

Used ICs: TDA7056B, TDA8356, AT24C08, BSC60H2(FBT), STR-G5653(SMPS control)

Many electrical and mechanical components in this chassis have special safety-related characteristics. Components which have these special safety characteristics in this manual and its supplements are identified by the international hazard symbols or UL, FCC, FDA or VDE marking on the circuit diagram and parts list. When replacing any of these components, substitute the one which has the same safety characteristics.

Difference between STR-G5653 and STR-F6654

a. Different size: STR- F6654 is larger
b. Different pin functions
c. Different electric characteristics: Larger power output, switching current, avalanche-rated and internal allowable power consumption for STR-F6654
d. internal allowable power consumption for STR-F6654.

Switch-mode Power Supply STR- G5653/F6654
The Series STR-G5653/F6654 is specifically designed to satisfy the requirements for increased integration and reliability in off-line quasi-resonant fly-back converters. The series incorporates a high-precise error amplifying control and drive circuit with discrete avalanche-rated power MOSFET,
featuring fewer external components, small-size and standard power supply.
Covering the power range from below 25 watts up to 300 watts for 100/115/230 VAC inputs, and up to 150 watts for 85 to 265 VAC universal input, these devices can be used in a range of applications, from battery chargers and set top boxes, to televisions, monitors, and industrial power supply units.  Cycle-by-cycle current limiting, under-voltage lockout with hysteresis, over-voltage protection, and thermal shutdown protects the power supply during the normal overload and fault conditions.
Low-current startup and a low-power standby mode selected from the secondary circuit completes a comprehensive suite of features. The series is provided in a five-pin over-molded SIP style package, affording dielectric isolation without compromising thermal characteristics.
Features
Fly-back Operation with Quasi-Resonant Soft Switching for Low Power Dissipation and EMI Rugged Avalanche-Rated MOSFET
Soft drive circuit MOSFET
Adjustable MOSFET switching speed
Choice of MOSFET Voltage and rDS(on)
Full Over-Current Protection (no blanking)
Under-Voltage Lockout with Hysteresis
Over-Voltage Protection
Direct Voltage Feedback
Low Start-up Current (100 Amax)
Low-Frequency, Low-Power Standby Operation
Over molded 5-Pin Package

SMPS schematic (STR-G5653)

EEPROM AT24C08: Features

Data EEPROM internally organized as 1024/2048 bytes and 64/128 pages×16 bytes

Page protection mode, flexible page-by-page hardware write protection

Additional protection EEPROM of 64/128 bits, bit per data page

1-Protection setting for each data page by writing its protection bit

Protection management without switching WP pin Low power CMOS

Vcc=2.7 to 5.5V operation.

Two wire serial interface bus, I2C-Bus compatible Filtered inputs for noise suppression with Schmitt trigger

Clock frequency up to 400 kHz

High programming flexibility

Internal programming voltage.

Self timed programming cycle including erase

Byte-write and page-write programming, between 1 and 16 bytes

Typical programming time 6ms(<10ms) for up to 16 bytes

High reliability

Endurance 106 cycles1)

Data retention 40 years1)

ESD protection 4000 V on all pins

8 pin DIP/DSO packages.

DC-coupled vertical deflection circuit TDA8356
Features
Few external components
Highly efficient fully DC-coupled vertical output bridge circuit
Vertical flyback switch
Guard circuit
Protection against:
Short-circuit of the output pins (7 and 4)
Short-circuit of the output pins to VP.
Temperature protection
High EMC immunity because of common mode inputs
A guard signal in zoom mode.
General Description
The TDA8356 is a power circuit for use in 90, and 110, colour deflection systems for field frequencies of 50 to 120 Hz. The circuit provides a DC driven vertical deflection output circuit, operating as a highly efficient class G system.

14BM18 uses mainly Philips’ advanced UOC-ultimate chip TDA935X/6X/8X and I2C-bus controlled IC. With combination of microcontroller and small signal processor, the TDA935X/6X/8X series feature high-integration, high-performance-to-price ratio and high-reliability and advanced functions with fewer external components, which provide much convenience for manufacturing and technical service.

Microcontroller and small signal processor TDA935X/6X/8X

The super chips TDA935X/6X/8X are good in pins compatibility. Differences among them are shown as follows.

TDA9351 48K PAL/NTSC/SECAM+1 PAGE TELETEST

TDA9350 48K PAL/NTSC+1 PAGE TELETEST

TDA9361 64K PAL/NTSC/SECAM+10 PAGE TELETEST

TDA9360 64K PAL/NTSC+10 PAGE TELETEST

TDA9380 32K PAL/NTSC

TDA9387 32K NTSC

TDA935X/6X/8X PS/N2 series TV signal processor-Teletext decoder with embedded Controller

General Description

The various versions of theTDA935X/6X/8X PS/N2 series combine the functions of a TV signal processor together with a ¬-Controller and US Closed Caption decoder. Most versions have a Teletext decoder on board. 

The Teletext decoder has an internal RAM memory for 1or 10 page text.

The ICs are intended to be used in economy television receivers with 90 and 110 picture tubes.

The ICs have supply voltages of 8 V and 3.3 V and they are mounted in S-DIP envelope with 64 pins.

Schematic (Full)

Click on the pictures to magnify

5W Mono BTL Audio Amplifier with DC Volume Control TDA7056B

The TDA7056B is a mono Bridge-Tied Load (BTL) output amplifier with DC volume control.
It is designed for use in TV and monitors, but is also suitable for battery-fed portable recorders and radios.  The device is contained in a 9-pin medium power package.
A Missing Current Limiter (MCL) is built in. The MCL circuit is activated when the difference in current between the output terminal of each amplifier exceeds 100 mA (300 mA type). This level of 100 mA allows for headphone applications (single-ended).
Features
DC volume control
Few external components
Mute mode
Thermal protection
Short-circuit proof
No switch-on and switch-off clicks
Good overall stability
Low power consumption
Low HF radiation
ESD protected on all pins.

DESIGN or SERVICE mode
To enter the USER SERVICE mode:
Caution: The user service mode adjustment can be changed only when service personnel adjust the whole set data during servicing. As the control data have dramatic effects on functions and performance of the TV, service personnel should not tell user how to enter the SERVICE mode to avoid improper data settings.
Set the volume to 0. Then press and hold the MUTE button on the remote control, and press the MENU button on the TV to enter the SERVICE mode.

(In this case, the S mode cannot be stored in the EEPROM. To exit from the S mode, turn off the TV set. )
After entering the S mode, Red S is displayed on the upper center of the screen and MENU1 is default. 

Use the POS+/- buttons to highlight an adjustment and the VOL+/- buttons to adjust it. 

The adjusted data are immediately output and stored in the EEPROM.

With remote control system software TDA935X, all options can be set in the SERVICE mode and stored in EEPROM. Data related to picture, sound and geometric adjustment are also stored in EEPROM

Supply Voltage Adjustment
Caution: +B voltage has close relation to high voltage. To prevent X-ray radiation, set +B voltage to the rated voltage.
Make sure that the supply voltage is within the range of the rated value.
Connect a digital voltmeter to the +B voltage output terminal of the TV set. Power on the TV and set the brightness and sub-brightness to minimum.
Regulate voltage adjustment components on the power PCB to make the voltmeter read 115±1V.

How to enter service mode to CTV sets using TDA9351 and TDA8370 syscon-chroma IC – adjustments – IC pin voltages

NXP TDA8370, TDA9351, TDA9353, TDA9361, TDA9363-XXX SERIES - service mode, adjustments, default data values, IC pin voltages, Circuit diagram and more....

REPLACEMENT OF MEMORY IC
This TV kit uses memory IC. In the memory IC are memorized data for correctly operating the video and deflection circuits.
When replacing memory IC, be sure to use IC written with the initial value of data.

PROCEDURE FOR REPLACING MEMORY IC
(1) Power off
Switch the power off and unplug the power cord from AC outlet.
(2) Replace IC
Be sure to use memory IC written with the initial data values.
(3) Power On
Plug the power cord into the AC outlet and switch the power On.
(4) Check and set system default value:
1) Press “MENU” key followed by digits '6''4''8' and '3'. Then Press “TEST” key on the Remote control unit for factory used.
2) The red “M”or”factory” will be displayed on the screen, repeat this and it will changed as follow:
Normal-M(factory)-BUS open-normal..
3) Press digital key, (Mkey) and corresponding on-screen display will be appeared.
4) Check the setting value of the SYSTEM default value of Table below. If the value is different,
select items by [CH+]/[CH-] keys and set value by [VOL+]/[VOL-] keys.
5) Press “STANDBY” key again and return to the normal screen.

SERVICE ADJUSTMENT

B1 POWER SUPPLY

1. Receive normal colour bar signal.

2. Connect DC voltmeter to VD524- and isolated ground.

3. Adjust potentiometer in power unit to get the voltage as 110V ±1.0V for 21 inch hereinafter,

FOCUS ADJUSTMENT

1. Receive a crosshatch signal.

2. While watching the screen, adjust the FOCUS VR to make the vertical and horizontal lines as fine and

sharp as possible.

BUS CONTROL ADJUSTMENT

TDA9351/9353:to enter BUS control mode, Press “MENU” key followed by digits '6''4''8' and '3'. Then press digit Press “0” to “9“ key, (Mkey) and corresponding on-screen display will be appeared.

TDA8370: To enter BUS control mode, Press “MENU” key followed by digits '6''4''8' and '3'. then Press “TEST” key on the Remote control unit twice for factory used(or press digits '6''4''8' and '3' twice.). and then press digit Press “0” to “9“ key, (Mkey) and corresponding on-screen display will be appeared.

On TV screen “TEST” will be indicated, this means entered bus control mode.

And press following key, each function will be available.

Geometrical adjustment
MENU8 (9351)/servise 1(8370)
Receive PAL standard Complete pattern signal.
Adjustment steps

a) Adjust V. SLOPE, to the center horizontal line just appeare from half bottom shadow.
b) Adjust V. SIZE, to get 90% of vertical picture contents would be displayed on CRT.
c) Adjust V. SHIFT, the center horizontal line correspond to CRT vertical center.
d) Adjust H.SHIFT, to get the picture horizontal center correspond to CRT horizontal center.
Receive NTSC signal and repeat above
AGC Adjustment.
MENU7 (9351) / servise 2(8370)
Receive 60dBμ(1mV)VH colour bar pattern signal，adjust AGC value（voltage from high to low to reduce noise gradually and just disappeared point.

CRTcut off and white balance adjustment.

MENU9 (9351)/B W BALANCE(8370)

Receive white signal.

a) CRT cut off adjustment.

1. Select “SC”, then automatically vertical scan will be stopped.

2. Adjust SCREEN control on Flyback transformer to get the darkest single horizontal line (red,green, or blue, sometimes shows more yellow, more purple or more white).

b) White balance adjustment.

1. Select RD/BD menu.

2. Adjust RD/BD to get colour temperature as x=281, y=311

c) Sub-Brightness adjustment. (Use stair case signal)

1. Select SB menu.

2. Adjust SB to get the darkest step being cutoff.

Default data values

IC Pin voltages

Circuit diagram / Schematic 

AV OPTION:

MENU1→AV CFG;
O=TV→AV;
1=TV→AV1→AV2;

2=TV→AV1→AV2→S-VIDEO;

3=TV→AV1→AV2→S-VIDEO→YUV;
5= TV→AV→S-VIDEO;

6= TV→AV→S-VIDEO→YUV;

7= TV→AV→YUV;
8=TV→EURO;
9=TV→AV→EURO

The function of pin 20, 28, 29, 31, 32, 35 and 44 is dependent on the IC version (mono inter-carrier FM demodulator/QSS IF amplifier and East-West output or not) and on some software control bits. 

The vertical guard function can be controlled via pin 49 or pin 50. the selection is made by means of the IVG bit in sub address 2BH.

When additional (external) selectivity is required for FM-PLL system pin 32 can be used as sound IF input.
This function is selected by means of SIF bit in sub address 28H.
The reference output signal is only available for the CMB1/CMB0 setting of 0/1. for the other settings this pin is a switch output.

Hbuster HBTV 42L07FD – SMPS schematic

Used ICs: SCC9502S, L6562D, STRA6059H

Click on the pictures to magnify

Toshiba 22AV733G LCD TV – internet setting – Audio amplifier schematic - power board circuit diagram – using with network

MAIN BOARD - 715G3747-D

POWER BOARD - 715G3721

Internet Explorer Settings
When Windows XP SP2 or Windows Vista is used, ActiveX control and pop-up windows are limited by the enhanced security function and this system may not work. In that case, perform the Internet Explorer setting using the following procedure to restore normal operation
Windows version check
1. [My Computer (right-click)] - [Properties]
2. Internet Explorer setting - [Tools] - [Internet Options]

Using with Network

Precaution: To use ZEUS Service Manual Ver.2 with network, the file-path names written on the source files of each ZEUS Engine Program Ver.2 and ZEUS Service Manual Ver.2 are to be modified.

Perform the procedure described below.

Preparation

1. Run the program file zuesFPch.exe to install the program file for File-Path to the Local PC.  -> Download zeusFPch_setup.zip (2.3MB)

2. Run the program file ZeusSetup_v2.0.exe to install the ZEUS Engine Program in C:\Program Files\zeus of the local PC. This can be done by running the installer program provided.

3. Create the appropriate folder where the ZEUS Engine Program Ver.2 and the ZEUS Service Manual Ver.2 to be stored in the server.

4. Move the ZEUS Engine Program of step 2 to the folder created at step 3 in the Server.

5. Detach the ZEUS Service Manual Ver.2 to the folder created at step 3 in the Server.

6. Unzip the ZEUS Service Manual Ver.2 within the folder in the Server. 

Example of folder:

Procedure of File-Path
The zeusFPch is the exclusive program to exchange the file-path names written in both source files of ZEUS Manual and ZEUS Engine program into those applicable to the network use.

Whenever changing the file-path of both ZEUS Engine Program and ZEUS Service Manual to use with network, pay the attention to set the "Exchange to" column that should have a proper relation between ZEUS Engine Program and ZEUS Service Manual with referring the following.

1. Run the zeusFPch and set "Exchange to" by referring to the examples below.
Example 1 :
In the "Exchange to" column shows the relation between ZEUS Service Manual and ZEUS Engine Program.
../ counts the relation between.
Thus in this case, it must be ../../zeus/ (2 counts).

Example 2 :
In this case, it must be ../../../zeus/ (3 counts).

2. Run the zeusFPch to change the path in the ZEUS Engine Program Ver.2.
3. Set ZEUS Engine Program in the created folder in the server to the "Target Folder", and then press "START"
(This procedure is one time only)

4. Run the ZeusFPch to change the path in the ZEUS Service Manual Ver2.
5. Set unzipped ZEUS Service Manual in the created folder in the server to the "Target Folder", and then press "START".  (This procedure is required whenever placing service manual.)

Confirmation
Confirm that service manual on the server can be operated normally by client PC.
Note:  In case of accessing the ZEUS Manual through WEB site, the small pop-up window appears at the left bottom corner on the screen whenever searching the location links. This is not malfunction.

A Known Malfunction

Autodesk® DWF™ Viewer version  (Free software provided through WEB)

Use Autodesk DWF Viewer ver. 6.0.

Through WEB, ver. 6.5 has been released but with it, the linking function in this manual may not work properly.

If ver. 6.5 has been installed, uninstall it and reinstall ver. 6.0.

To get ver. 6.0, click the icon, or contact to the nearest Toshiba Service Centre for further assistance.

Freezing windows opened  (Cannot close the open windows)

This may happen occasionally.  In case of encountering this, follow the procedure below.

1. Press [Ctrl], [Alt] and [Delete] keys at the same time to engage windows security windows.
2. Then, choose TASK manager and Application tab, and select TOSHIBA SERVICE MANUAL-Microsoft Internet Explorer.
3. Click TASK-end.

Main Window back forwarded

The real cause has not been found yet but with this condition, nothing disturbs the service manual operation.  Continue to use by operating the windows.

Precaution when opening the diagrams

While opening the diagrams, the menu in the left frame changes its color to GRAY. This is an indication that the viewer is processing.
With this condition, the menu indication color may stick to the GRAY color or Windows may freeze if clicking other menu.
To avoid such things, do not operate any others while menu turns GRAY color.
If entering this, re-open the service manual or refresh the left frame.
Audio amplifier schematic

[In the event that the screen is damaged or the liquid crystal (fluid) leaks, do not breathe in or drink this fluid.  Also, never touch this fluid. Such actions could cause toxicity or skin irritation. If this fluid should enter the mouth, rinse the mouth thoroughly with water. If the fluid should contact the skin or clothing, wipe off with alcohol, etc., and rinse thoroughly with water. If the fluid should enter the eyes, immediately rinse the eyes thoroughly with running water]

                                                           To see the SMPS circuit diagram, visit the previous post here

715G3721-P01-H20 - LCD power supply schematic - Toshiba 22AV733G LCD TV

Used semiconductors: LD7575A-PS, 2SK4101LS(FET), OZ9938GN, AO4616

Back-light inverter section circuit

Main SMPS section circuit

Click on the schematics to magnify