Service mode entry & back-light inverter working principles _ Burn-in _ Protection mode.
With signal input, press “Power” button to turn off the
monitor.
Press “Menu” and “+” buttons together, and then press
“Power” button to turn on the monitor.
After power on. Press “-” key to enter Factory mode.
Exit > Exit from Factory mode and back to NO OSD Status.
Auto Color > automatically calibrate chip ADC parameters
by using internal DAC.
Burn In > Enable or disable the Burn-in mode by choosing
ON or OFF.
Reset Timer > Reset the “Turn-on time” of the panel to
0H0M.
Color Temp > The R, G, B of Cool (9300K), Warm (5700K)
and Desktop (6500K) are generated from scaling chip’s back-end white-balance
program.
Time > Turn-on time of the panel.
DEBUG > Debug tool of scale IC.
Burn-in pattern
Burn-in pattern will self-generate automatically without VGA
and DVI cable plugged in when the monitor set at Burn-in on mode and burn-in
pattern will not be stopped until plugging in the VGA cable. Exit Burn-in mode method
as follow: plugging in the VGA/DVI cable, press “Menu” button to call out OSD
Main Menu, Press “Plus Key” to select “Other Settings Menu “then pop submenu
and choose Factory reset.
Auto Color Balance (Automatically calibrate chip ADC
parameter by using chip internal DAC.
If it is a new-built set, press “Auto/Plus” button to
execute “Auto Color” at standard video pattern 5-MOSAIC pattern.
Confirm the following steps to perform “Auto Color Balance”:
* Connect the VGA cable with the standard video pattern
generator and display 5-MOSAICpattern on the monitor.
* Press “Power” button to power off the monitor.
* Press “Menu” and “Auto/Plus” buttons simultaneously; then
press “Power” button to power on the monitor.
* Press “Plus Key”, select “Other Settings Menu” ,then Press
“Plus Key” and choose factory at bottom
* Set Burn In Mode item to ON, then execute Auto Color item.
After the “Auto Color Balance” process finished, go back to
“Other Settings Menu”, and press “Factory Reset” to exit Factory mode.
Back-light Inverter _ Working Principle.
CLICK ON THE SCHEMATIC TO ZOOM IN
+5VDC provides the power for U1; the control signals
Brightness and ON/OFF come from I/F board. ON/OFF signal connect to pin16 of U1
and makes U1 enable. Brightness signal connect to pin 13 of U1 and regulates
the brightness of panel .TIMER makes up a network of delaying time circuit and
R23 make up a divided voltage network, C3 & C18 are used to control the
start-up timing. The operation frequency
is determined by the external Resistor R16and capacitor C8 connected to pin3 of
U1. C7 is used for soft start and compensation. The output drives, include
DRV1, DRV2 (pins 6, 8,9,10 respectively) output square pulses to drive MOSFET
Q6, Q7 and each of them is consist of a N+P channel MOSFET. Q6 and Q7 work as All Bridge structure, and it
is high efficient, PWM switching. During start up, VSEN (pin1) senses the
voltage at the transformer secondary. When VSEN reaches 3.0V, the output voltage is regulated. If no current
is sensed for approximately 2seconds U1 will shut off. The current flowing
through CCFLis sensed and regulated through sense resistor R6, R19. The feedback
voltage connected to Pin1(ISEN),then compared with a reference voltage (1.5V)
via a current amplifier, resulting that PWM drive U1 to work and
output square pulses for all bridge switches.
Protection Circuit
Over-voltage and over-current protection are monitored by
the voltage on VSEN (pin1). During normal operation, if a CCFL is damaged or
removed, the voltage at VSEN exceeds the user-defined, preset voltage set by
OVPT (pin15),the driver output duty cycle is regulated and the shutdown delay
timer is activated. OVPT sets the overall protection threshold
voltage that is lower than3V (VSEN) threshold. Once the voltage at TIMER pin
reaches 3V, the IC will shut down and latch. OVPT voltage setting is determined
by a resistor divider (R18/R8) connected to the OVPT.
The over-voltage protection feature is implemented by using
an external capacitor divider (C1/C15/C16/C17) to sense the output voltage. The
divide-down voltage signal is sent to the IC Pin1 (VSEN), thus regulate the
output voltage.
If a CCFL is removed, fails or is damaged during normal
operation, CCFL current is no longer sensed and the voltage on ISEN pin drops.
The voltage at the SSTCMP (pin2) rises rapidly because there is no current
feedback at ISEN (pin14).When the voltage at SSTCMP reaches a threshold of
approximately 2V and ISEN is less than 0.7V, a current source charges the
capacitor (C3) connected to TIMER (pin12). Once the voltage level at the TIMER
pin reaches a threshold of approximately 3V, the drive outputs shut down and latch.
To resume operation, toggle the ENA signal or restart VDDA.
