Monday, January 20, 2014

HITACHI PLASMA TV - 42EDT41 - HORIZONTAL LINE FAULT - TROUBLESHOOT


SUSTAIN SHORT [Line ON]
Horizontal Sustain Influence for Z and Y SUS PWBs, Y Drive Upper and Y Drive Lower PWBs.
(Note: Defect Line shown is on the bottom, so the back X-Drive Left PWB would be involved or the Z-SUS output from the bottom connector).
Note: The Screen can be broken down into 8 Horizontal Rows. (See the Bottom PWB layout) from the Drive PWBs (4 from Upper Drive PWB and 4 from Lower Drive PWB) and 2 Rows from the Z-SUS PWB (Top and Bottom). Each of the connectors from the Control, X-Drive Left and Right PWBs controls each column. Try to determine which area of the screen is affected to determine the PWB involved.
SUS open (line off)
Horizontal Sustain Influence for Z and Y SUS PWBs, Y Drive Upper and Y Drive Lower PWBs.
(Note: Defect Line shown is on the bottom, so the back X-Drive Left PWB would be involved or the Z-SUS output from the bottom connector).
Note: The Screen can be broken down into 8 Horizontal Rows. (See the Bottom PWB layout) from the Drive PWBs (4 from Upper Drive PWB and 4 from Lower Drive PWB) and 2 Rows from the Z-SUS PWB (Top and Bottom). Each of the connectors from the Control, X-Drive Left and Right PWBs controls each column. Try to determine which area of the screen is affected to determine the PWB involved.
X DRIVE LEFT AND RIGHT PWB INFORMATION:
Each X Drive PWB Receives LOGIC signals from CONTROL PWB and makes ADDRESS PULSE (generates Address discharge) by ON/OFF operation, and supplies this waveform to COF (data) "Chip On Film".
CONTROL PWB:
This picture shows the Control PWB and it’s 3 connectionsat the bottom to the COF connectors. Creates signal processing (Contour noise, reduction ISM,..) by an order of many FETs turning on/off for each DRIVER. Controls R, G, B (each 8 bit outputs, then parallel split).   Uses 3.3V / 5V (2 kinds of power regulators on board ).
CONTROL PWB:
This is a blow up of the Left side of the Control PWB showing the 3.3V and 2.5V Regulators.