The plasma TV models PS-42D8 B/S and PH-42D8 launched by our
company are equipped with RS-232 interface for upgrading that is carried in the
steps below:
Select a connection wire of serial port (see the figure
below), which is required to have a notch on its both ends, and also the pins 2
and 3 on the two ends are cross connected.
- Use the serial port connection wire to connect PCwith PDP and set PDP to the off position.
- Open the folder of the upgrading software and double click the FlashUpgraderNT (on condition of window 2000/XP/NT) or the FlashUpgrader (on condition of window 98)
After running the programs the following interfaces will
appear:
Based on the features of computer set up the serial port
(COM Port) and select corresponding serial
port (if it’s not possible to burnt-write other serial port can be used
instead). Baud-select 115200 and then select Reset Target After Download. Hit
flash press button and it’s ready to operate. For the setup of other items
please refer to the figure above (already defaulted by the system so it’s
normally unnecessary to alter)
- Switch on PDP and it begins to run the burnt-write program;
- Once it’s over with burnt-write, the cancel pushbutton will become flash. Switch off the main power and then to switch on the TV set again.
Note: Do not switch the power or the set off in the course
of burnt-writing. Otherwise it may result in the inability of the flash to
burnt-write again.
OPERATION PRINCIPLE OF PLASMA DISPLAY
Plasma plane screen technology represents the
state-of-the-art and it’s also the best choice for high quality picture and
large purely place screen. Plasma display screen PDP is a display unit
employing gas discharge. This screen uses plasma tube as its light emission
component. The faceplate (panel)of PDP consists of many image elements (plasma
tubes) for example, the series PS ,PH pdp now on the market consists of 852*480
image elements. Each image element in turn consists of three kinds of image
sub-elements. Each image element is actually a plasma tube. These tubes are
present respectively in red, green and blue colors. Each small chamber that
corresponds to each plasma tube is filled with neon and xenon gases. After
applying high voltage between the plasma electrodes, the gases in the small
chambers of the plasma tubes sealed in the two layers of glass will produce
ultraviolet so as to excite the three basic color (red, green and blue)
fluorescent powder to emit visible light. Each plasma tube acts as an image
element. From the composition of these image elements in different brightness,
darkness and colors result the pictures and images of various grays and colors,
which is very similar to the light emission of display tube. Plasma technology
is obviously different form other display methods and is more advanced in
structure and formation. Its working principle is similar to normal daylight
lamp. The TV color picture is composed of the light emitted from various
independent fluorescent powder image elements and therefore the picture is
fresh and gaily colored, bright, clean and clear. Furthermore the most
outstanding feature of plasma TV is that it can be made super thin and it’s
easy to make TV sets of more than 40” with completely plane big screen but in
thickness less than 100 mm (Our Model PS-42D8 is only 79mm
thick and it’s the thinnest in the market at present.)
Plasma TV model PS-42D8 B/S and PH-42D8 series of XOCECO is
designed and developed by XOCECO itself. In terms of the main CMOS chip this
series of TV set employs PW181 made by Pixelworks Company.
WORK PROCESS FLOW OF MODEL 'PS' & 'PH' SERIES
This TV model is based on dual MCU control of which the main
MCU is PW181(N501, taking care of the operation of various chips (including
image treatment, channel switching, image display etc.), infra red remote
control receiving, the standby control, the control of auxiliary CPU, menu
display, debugging of picture effects and other major functions. The auxiliary
CPU is SDA555X(NM5, which is responsible for sound treatment (including volume
adjustment, control of alt and base sound, stereo decode), station searching
control, push button, separation of 3D Y/C (valid only for system N) as well as
the CCD/V-CHIP decoding for the text for oversea sale TV sets etc. Connection
between two MCU is made by means of three pins of X708, i.e., INT
(interruption), S1(RXD), S2(TXD).
SOUND VOLUME
This model employs double integrated tuner (including high
frequency and medium amplification circuits). The signal received by antenna is
fed to the main tuner, TUNER1, which contains a high frequency distributor,
from which RF signal is shunt to supply to TUNER3 for use. Pin 14 of TUNER1 is for
the power supply of high frequency distributor (+5v). Tuners are controlled by
auxiliary MCU NM5 (SDA and SCL) to select proper channel and carry out correct
switching of systems. After high amplification and medium amplification
decoding, video signal and audio signal are output. The output signal of TUNER1
is fed into decoder N102 as the display of main picture whereas the output
signal of TUNER3 is fed into decoder N302 as the display of the auxiliary
picture for dual picture. Audio signal is directly fed into audio frequency
processor NM2 MSP3440. At the same time dual way tuners all send their medium
frequency signal of the second sound to NM2 for treatment (used for decoding of
stereo or automatic sound volume control). NM2 is provided with the switching
over device for audio frequency channels. Audio input of VGA/DVI/YprPb of the main board,
after the switching-over as selected by N3, is fed together with the audio
signal of TV and AV into NM2, where switching over is selected. The selected
audio frequency signal is made use of in the following three ways. One way is,
after being subjected to the control of volume and alt and base sound, fed
separately through left and right sound channels into sound power amplifier
TPA3001 for amplification. Then it is fed into the loudspeaker for sound
reproduction. Another way is also fed separately through left and right sound
channels into earphone power amplifier NM9 TDA7053 for amplification before
being output to earphone socket for listening, of which the volume is
controlled by PWM signal produced by pin 50 of NM5.The remaining way is output
through video board as AV out.
Sound power amplifier TPA3001 is an amplification of
mono-channel high efficiency D type power. Under the condition of no heat
dissipation its output power can be as high as 20 w. It has the functions of over
current and overheating protection. Automatic protection comes in when the
input to the ground is short-circuited. Then output is stopped. After the
removal of short circuit, switch the set again and it restores to normal.
Therefore if the set becomes soundless due to the short circuit caused in carelessly
pulling out or plugging in the audio frequency wire (it is certainly not
recommendable to do so), just switch it on again and no big deal.
PICTURE & IMAGE
Y signal of AV and SVHS shares the same channel.
SVHS has priority. Identification of terminal S is determined by electric level
SID fed from SVHS socket to NM5. When the electric level of SID is of high value,
the system is identified as SVHS. Signals from TV or AV and YCRCB are
altogether fed into digital decoder VPC3230 (sent separately in two ways to
N102 and N302). Channel switching is carried out. They are decoded into 16bit
CCIR601 signal to be fed into the processor of lower level for treatment. VPC3230
mainly functions to switch over channels, separate Y/C of 4 lines, decoding of
colors and adjustment of picture effect.
MAIN CHANNEL
The digital YCRCB signal in the format of CCIR601 after
being decoded in N102 is fed into non-interlace processor N204 PW1230 for
treatment from alternate-line into non-interlace. VD1_CLK,VD1_HSYNC VD1_VSYNC,
VD1_ACTIVE and VD1_FIELD sent from VPC3230 is used as a key signal to identify
modes. If certain channels become abnormal the corresponding pictures will also
become abnormal. In addition to the function PW1230 has to process the signal
from alternate-line into non-interlace, it can also function to enhance the
picture and convert the movie modes 3:2/2:2. The adjustment of brightness and
contrast of the main channel is performed by this chip whereas the adjustment
of chroma and definition is performed by N102. The digital 24 bit RGB signal
output from
PW1230 after treatment is fed into V PORT of N501 PW181 for
further processing. The signals of VCLK (clock) and VVS(field synchronization)
and VHS(line synchronization) and VPEN(enable signal)are the basic reference
for the image processing of lower level.
For TV set of mono N system, this series has an additional
3D Y/C separation function in the main channel, which is performed by ND02
Upd64083 so as to enhance the quality of the image. In this case the signal
flow process of the main channel is different. Video signal and AV/SVHS signal sent
from TUNER1 first undergo switching in the switch circuit ND01, then are fed
into ND 02 for separation of brightness from color and output as signal Y and
C. For N102, no matter whether it’s TV or AV/SVHS, finally the signals are all
fed in the form of Y/C into the input port of VIN1and CIN. Yet the setup for
the software is somewhat different.
Auxiliary CPU performs the decoding for the text of main
channel or CCD/V-CHIP. Video signal is directly fed to pin 12 of NM5 for
decoding. The decoded text or CCD/V-CHIP signal is output in the form of R, G,
B, FB and fed into N102 for character superposing.
SUB-CHANNEL
Signal CCIR601 after being decoded in VPC3230 is directly
fed into PW181 G PORT where direct processing is carried out by PW181. The
non-interlace processor inside PW181 performs the non-interlace conversion in
this channel. Relatively speaking, the efficiency of the internal non-interlace
processor of PW181 is lower than that of PW1230. Therefore when displaying dual
picture the main picture effect is better than that of sub-picture. The
adjustment of brightness, contrast, definition and chroma is performed by N302.
The decoding of CCD/V-CHIP in this channel is specially
performed by 21 line decoder N301 Z86229. The decoded information is superposed
onto the image in N302 also in the form of R, G, B and FB.
For VGA and YPRPB, after the selection in N1 YPRPB1 and
YPRPB2 are fed together with N402 for channel selection. The selected signal is
fed into the ADC part of N403 AD9887 for A/D conversion so as to produce 24 bit
digital RGB signal to be fed into the G PORT of PW181. The line and field synchronous
signal of VGA is directly fed into N403 whereas The line and field synchronous
signal of YPRPB is obtained after synchronous separation of Y signal of SOGIN in AD9887 (This signal is input to N403 pin 108).
AD9887 is also provided with DVI input port. The DVI input
signal is converted into 48 bit digital RGB signal and sent to G PORT of PW181
for processing. The selection from DVI and VGA/YPRPB is performed by
AD9887.Certain organizations for the oversea sales of this TV series have been
equipped with the capability to decode HDCP. PORTA4 and PORTA5 of PW181 verify
the password (cipher key) through bus line with broadcast equipment. Each TVset
has its own independent password, which is stored in EEPROM.
The mode identification of VGA or YPRPB is performed by
PW181. The identification process is :
When selecting channel signal input PW181 presets the
synchronous selection of AD9887 so that it can directly output the required
synchronous signal for direct feeding to PW181. The synchronous signal format
is identified inside PW181. By making cross-reference with the format table
pre-stored inside a most similar format is obtained. Then the parameters of
this format are called for use in setting up the parameters for modular
conversion so that it is optimized. At the same time the conversion coefficient
of SCALER is confirmed.
Finally the video signals of different channels are sent
respectively to V PORT and G PORT of main processing chip PW181 for processing.
PW181 has such processing capabilities as “picture out of picture”, “picture in
picture”, “multiple pictures”. So long as the signals come respectively from V
PORT and G PORT, they automatically become “picture out of picture”, “picture
in picture”. PW181 has the function of SCALER, which means it can conduct format
conversion for the input signals of different format to enable it to meet the
requirement of the screen for format and finally output the signal in the form
of 24 bit RGB.
The standard of interface for PDP screen is LVDS (low
voltage differential signal). So the digital RGB signal output from PW181 still
needs to be converted into LVDS signal by the conversion interface chip of LVDS
- N602 DS90C385 (This chip may vary with the manufacturer of the screen). This converted
signal is in turn fed to the screen for driving purpose. The output of N602 is
four pairs of differential signal and one pair of clock signal. If any pair of
signal is abnormal then the image is affected to be abnormal for example, a
certain color may become abnormal. The PWRDOWN signal output from PW181 is used
to control the operation of N602, which works under low electric level.
PW181 is also the main CPU. Its program is
stored in the externally connected flash N601. The software upgrading of RS-232
is actually the upgrading of the stored memory in N601 by PW181. The interface
of menu is also produced by PW181. PW181 can automatically produce self-check
signal for troubleshooting.
The above is a short account of the signal flow process of
the TV series. Please note HS (Horizontal Synchronous), VS (Vertical
Synchronous) and CLK (Clock), PEN (Enable) between individual stages are invariably
the basic reference for the mode identification of lower level chip. Make sure
that they are in normal working condition.
PW181 controls the standby of the complete TV set. The
POWER-ON signal output from PORTB3 of PW181 is used to control the operation of
the power supply board. When it is POWER_ON, the TV set is switched on with low
electric level and is in standby with high electric level. When it’s in standby
the remaining power supply is only 5VSTBY.
The voltage VS required by the operation of screen is also
controlled by VS_ON output from logic board. It is in operation when the
electric level is high. Only when the logic board receives correct signal (clock,
synchronous, enable etc.) can VS_ON be correctly output. The operation of PDP
screen has very high demand for the time sequence of power supply. If the time
sequence is wrong it might make the screen unable to work normally.
