At first glance, the 2004 DLP Television system control area looks rather complicated. However, by viewing system control as two separate, but related, areas, we can easily clear the confusion generated by the use of 2 microprocessors and 2 EEPROMs.
Both are located on the G-Hyper/Signal/DBEP circuit board.
But, before panic sets in, let us first mention that a problem with either
section can be resolved by replacement of the circuit
board. The difficulty lies in properly assessing the situation in order to make
the determination that the board requires replacement.
Being on the subject of replacement parts makes this
a good time to insert Table 1, a list of G-Hyper/Signal/DBEP circuit board part
numbers – by model.
MODEL PART NUMBER
46HM84 23148133
52HM84 23148131
52HMX84 23148134
62HM84 23148132
62HMX84 23148135
The main System microprocessor (IC601) is still the
central component of system control. In some fashion, it communicates with all
other circuit areas to control functionality and monitor circuit operations.
The second microprocessor, IC501, is basically a message
handler, relaying information from the TALEN light engine to the main system
microprocessor. Oddly enough, while IC501 is called the Backend Process (BEP)
micro, it is not in direct communication with the Digital Backend Processor [DBEP]
chip, IC301.
The main system micro is central to control
operations
The M306V7MG-082FP chip used is a 100-pin single-chip
flat pack microcomputer designed for use in Closed-Caption televisions, such as
the 2004 DLP product line. The chip, with 256K of internal ROM
(read-only-memory), 10K of RAM (random-access-memory), 60K OSD ROM, and 2.2K
OSD RAM, is a mask ROM version. Meaning that the IC’s basic programming is done
during the fabrication process, is not expected to change, and is not user
programmable. The chip operates within
the parameters defined by the initial programming. That is not to say, however, that televisions using this type of
chip are locked into one-way performances. The user can change certain aspects
of operation, with
the
data related to those changes being stored in the system EEPROM, IC603 (Figure
3). Rarely does a customer watch a television in the original out-of-the box state.
Each time a change is made, be it as simple as a volume level adjustment, that
data is stored in IC603.
The AT24C256N EEPROM shown in Figure 3 is a 256K bit,
8 pin PDIP (Plastic Dual In-line Package) with an operating voltage of 2.7V
(max. of 5.5V). Two-way communication between this chip and the system
microprocessor allows user controlled data to be written to the EEPROM, stored,
and fed back to the microprocessor at start-up. The process ensures that when a
customer turns on his/her television, it looks and sounds like it did when it
was turned off. Communication takes
place over the Serial Clock (SCL) and Serial Data (SDA) lines that compose the
I2C bus running throughout the 2004 DLP television. While Figure 4 shows us that the information
traveling on this bus is dispatched and
received on the G-per/Signal/DBEP circuit board, it is all routed through the
Power Supply circuit board before being detoured to the various final destinations.
Illustrates the locations of the key ingredients in
microprocessor operation.
SUPPLY VOLTAGE
Two operating voltages are supplied to IC601 from the
Standby power supply. Both are required for proper operation, but each powers a
separate area of the IC.
- The system I/O area of IC601 is powered by 5V (5V-1 line) at pin 99
(VCCE). The 5V supply is generated by the Standby power supply
2. The
chip’s internal logic area is powered by 3.3V applied to pin 16 (VCCI). The voltage is supplied by regulator IC606 (pin 1) and is derived from the 5V standby voltage.
GROUND
To
form a completed circuit, IC601 is grounded at pin 14 (VSS).
TIMING
Clock generation is accomplished by connecting 10Mhz
crystal oscillator X6001 between pins 13 (XOUT) and 15 (XIN).
Regulator IC606 (pin 4), supplies the reset signal
needed to refresh the microprocessor each time the unit is turned ON.
COMMUNICATION
Each time the unit is powered ON, information is
exchanged between EEPROM IC603 (pins 5 & 6) and system microprocessor IC601
(pins 28 & 31). Clock (TV_SCL0) and data (TV_SDA0), shown in Figure 8,
information is exchanged to sync the two chips and load “last status”
information into the microprocessor. This
“last status” information contains all user settings memorized the last time the
unit was powered OFF.
BRANCHING OUT
The system microprocessor begins transmitting to and
receiving information from all other circuits connected to the I2C bus. Activity on the clock
(SCL1) and data (SDA1) lines, IC601 pins 29 & 30
respectively, can be monitored with an oscilloscope. Expect a very busy 5Vp-p
waveform on either line. A 3V DC level will be measured with a standard
voltmeter, with minor fluctuations in the DC level indicating activity.
As the G-Hyper/DBEP/Signal circuit board is
completely shielded and replaced as a module, suspected problems can be
evaluated most easily by checking the central connection point. In the 2004 DLP
television, the power supply circuit board serves as that central point, or
hub. Referencing the block diagram of Figure 10, we see that connector PJ13
(pins 6 & 7) carries I2C information to the power supply circuit board PA01
(pins 6 & 7).
Contd:
